sporq/kmk_firmware
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Still dirty, but moved the problem to a better place. Still unrealistic to hit

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This commit is contained in:
Kyle Brown 2019-03-02 15:14:11 -08:00
parent a882ef2c38
commit e2413a3c25
1 changed files with 12 additions and 16 deletions
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28
kmk/firmware.py
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@ -155,22 +155,12 @@ class Firmware:
:param update: :param update:
''' '''
if update is not None: if update is not None:
# TODO Sort why this is needed when mashing keys on split half
# This is a dirty hack to prevent crashes in unrealistic cases
try:
self._state.matrix_changed(
update[0],
update[1],
update[2],
)
except IndexError:
# If buffer get's corrupted, reset the master half.
# Alternative would be flush the contents and release all keys
import microcontroller
microcontroller.reset()
def _flush_buffer(self): self._state.matrix_changed(
self.uart.read() update[0],
update[1],
update[2],
)
def _send_to_master(self, update): def _send_to_master(self, update):
if self.split_master_left: if self.split_master_left:
@ -182,7 +172,13 @@ class Firmware:
def _receive_from_slave(self): def _receive_from_slave(self):
if self.uart is not None and self.uart.in_waiting > 0: if self.uart is not None and self.uart.in_waiting > 0:
if self.uart.in_waiting >= 60:
# This is a dirty hack to prevent crashes in unrealistic cases
import microcontroller
microcontroller.reset()
update = bytearray(self.uart.read(3)) update = bytearray(self.uart.read(3))
# Built in debug mode switch # Built in debug mode switch
if update == b'DEB': if update == b'DEB':
print(self.uart.readline()) print(self.uart.readline())
@ -216,7 +212,7 @@ class Firmware:
def init_uart(self, pin, timeout=20): def init_uart(self, pin, timeout=20):
if self._master_half(): if self._master_half():
return busio.UART(tx=None, rx=pin, timeout=timeout) return busio.UART(tx=None, rx=pin, timeout=timeout,)
else: else:
return busio.UART(tx=pin, rx=None, timeout=timeout) return busio.UART(tx=pin, rx=None, timeout=timeout)