Still dirty, but moved the problem to a better place. Still unrealistic to hit
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parent
a882ef2c38
commit
e2413a3c25
@ -155,22 +155,12 @@ class Firmware:
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:param update:
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'''
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if update is not None:
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# TODO Sort why this is needed when mashing keys on split half
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# This is a dirty hack to prevent crashes in unrealistic cases
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try:
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self._state.matrix_changed(
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update[0],
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update[1],
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update[2],
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)
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except IndexError:
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# If buffer get's corrupted, reset the master half.
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# Alternative would be flush the contents and release all keys
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import microcontroller
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microcontroller.reset()
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def _flush_buffer(self):
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self.uart.read()
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self._state.matrix_changed(
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update[0],
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update[1],
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update[2],
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)
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def _send_to_master(self, update):
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if self.split_master_left:
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@ -182,7 +172,13 @@ class Firmware:
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def _receive_from_slave(self):
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if self.uart is not None and self.uart.in_waiting > 0:
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if self.uart.in_waiting >= 60:
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# This is a dirty hack to prevent crashes in unrealistic cases
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import microcontroller
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microcontroller.reset()
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update = bytearray(self.uart.read(3))
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# Built in debug mode switch
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if update == b'DEB':
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print(self.uart.readline())
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@ -216,7 +212,7 @@ class Firmware:
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def init_uart(self, pin, timeout=20):
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if self._master_half():
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return busio.UART(tx=None, rx=pin, timeout=timeout)
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return busio.UART(tx=None, rx=pin, timeout=timeout,)
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else:
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return busio.UART(tx=pin, rx=None, timeout=timeout)
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