256 lines
8.0 KiB
C
256 lines
8.0 KiB
C
/* Copyright 2017 Jason Williams
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* Copyright 2018 Jack Humbert
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "is31fl3731.h"
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <util/delay.h>
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#include <string.h>
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#include "i2c_master.h"
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#include "progmem.h"
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// This is a 7-bit address, that gets left-shifted and bit 0
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// set to 0 for write, 1 for read (as per I2C protocol)
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// The address will vary depending on your wiring:
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// 0b1110100 AD <-> GND
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// 0b1110111 AD <-> VCC
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// 0b1110101 AD <-> SCL
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// 0b1110110 AD <-> SDA
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#define ISSI_ADDR_DEFAULT 0x74
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#define ISSI_REG_CONFIG 0x00
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#define ISSI_REG_CONFIG_PICTUREMODE 0x00
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#define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08
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#define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18
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#define ISSI_CONF_PICTUREMODE 0x00
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#define ISSI_CONF_AUTOFRAMEMODE 0x04
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#define ISSI_CONF_AUDIOMODE 0x08
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#define ISSI_REG_PICTUREFRAME 0x01
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#define ISSI_REG_SHUTDOWN 0x0A
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#define ISSI_REG_AUDIOSYNC 0x06
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#define ISSI_COMMANDREGISTER 0xFD
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#define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
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// Transfer buffer for TWITransmitData()
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uint8_t g_twi_transfer_buffer[20];
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// These buffers match the IS31FL3731 PWM registers 0x24-0xB3.
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// Storing them like this is optimal for I2C transfers to the registers.
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// We could optimize this and take out the unused registers from these
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// buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's
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// probably not worth the extra complexity.
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uint8_t g_pwm_buffer[DRIVER_COUNT][144];
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bool g_pwm_buffer_update_required = false;
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uint8_t g_led_control_registers[DRIVER_COUNT][18] = { { 0 }, { 0 } };
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bool g_led_control_registers_update_required = false;
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// This is the bit pattern in the LED control registers
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// (for matrix A, add one to register for matrix B)
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//
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// reg - b7 b6 b5 b4 b3 b2 b1 b0
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// 0x00 - R08,R07,R06,R05,R04,R03,R02,R01
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// 0x02 - G08,G07,G06,G05,G04,G03,G02,R00
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// 0x04 - B08,B07,B06,B05,B04,B03,G01,G00
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// 0x06 - - , - , - , - , - ,B02,B01,B00
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// 0x08 - - , - , - , - , - , - , - , -
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// 0x0A - B17,B16,B15, - , - , - , - , -
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// 0x0C - G17,G16,B14,B13,B12,B11,B10,B09
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// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09
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// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09
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uint8_t IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
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{
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g_twi_transfer_buffer[0] = reg;
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g_twi_transfer_buffer[1] = data;
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//Transmit data until succesful
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//while(i2c_transmit(addr << 1, g_twi_transfer_buffer,2) != 0);
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return i2c_transmit(addr << 1, g_twi_transfer_buffer,2);
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}
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uint8_t IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
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{
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uint8_t ret = 0;
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// assumes bank is already selected
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// transmit PWM registers in 9 transfers of 16 bytes
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// g_twi_transfer_buffer[] is 20 bytes
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// iterate over the pwm_buffer contents at 16 byte intervals
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for ( int i = 0; i < 144; i += 16 )
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{
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// set the first register, e.g. 0x24, 0x34, 0x44, etc.
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g_twi_transfer_buffer[0] = 0x24 + i;
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// copy the data from i to i+15
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// device will auto-increment register for data after the first byte
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// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
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for ( int j = 0; j < 16; j++ )
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{
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g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
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}
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//Transmit buffer until succesful
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//while(i2c_transmit(addr << 1, g_twi_transfer_buffer,17) != 0);
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ret |= i2c_transmit(addr << 1, g_twi_transfer_buffer, 17);
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}
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return ret;
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}
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uint8_t IS31FL3731_init( uint8_t addr )
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{
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uint8_t ret = 0;
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// In order to avoid the LEDs being driven with garbage data
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// in the LED driver's PWM registers, first enable software shutdown,
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// then set up the mode and other settings, clear the PWM registers,
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// then disable software shutdown.
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// select "function register" bank
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ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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// enable software shutdown
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ret |= IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 );
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// this delay was copied from other drivers, might not be needed
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_delay_ms( 10 );
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// picture mode
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ret |= IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE );
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// display frame 0
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ret |= IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 );
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// audio sync off
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ret |= IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 );
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// select bank 0
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ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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// turn off all LEDs in the LED control register
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for ( int i = 0x00; i <= 0x11; i++ )
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{
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ret |= IS31FL3731_write_register( addr, i, 0x00 );
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}
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// turn off all LEDs in the blink control register (not really needed)
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for ( int i = 0x12; i <= 0x23; i++ )
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{
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ret |= IS31FL3731_write_register( addr, i, 0x00 );
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}
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// set PWM on all LEDs to 0
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for ( int i = 0x24; i <= 0xB3; i++ )
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{
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ret |= IS31FL3731_write_register( addr, i, 0x00 );
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}
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// select "function register" bank
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ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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// disable software shutdown
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ret |= IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 );
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// select bank 0 and leave it selected.
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// most usage after initialization is just writing PWM buffers in bank 0
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// as there's not much point in double-buffering
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ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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return ret;
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}
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void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
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{
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if ( index >= 0 && index < DRIVER_LED_TOTAL ) {
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is31_led led = g_is31_leds[index];
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// Subtract 0x24 to get the second index of g_pwm_buffer
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g_pwm_buffer[led.driver][led.r - 0x24] = red;
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g_pwm_buffer[led.driver][led.g - 0x24] = green;
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g_pwm_buffer[led.driver][led.b - 0x24] = blue;
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g_pwm_buffer_update_required = true;
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}
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}
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void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue )
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{
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for ( int i = 0; i < DRIVER_LED_TOTAL; i++ )
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{
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IS31FL3731_set_color( i, red, green, blue );
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}
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}
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void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue )
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{
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is31_led led = g_is31_leds[index];
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uint8_t control_register_r = (led.r - 0x24) / 8;
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uint8_t control_register_g = (led.g - 0x24) / 8;
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uint8_t control_register_b = (led.b - 0x24) / 8;
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uint8_t bit_r = (led.r - 0x24) % 8;
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uint8_t bit_g = (led.g - 0x24) % 8;
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uint8_t bit_b = (led.b - 0x24) % 8;
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if ( red ) {
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g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
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} else {
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g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r);
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}
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if ( green ) {
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g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g);
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} else {
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g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g);
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}
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if ( blue ) {
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g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b);
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} else {
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g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
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}
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g_led_control_registers_update_required = true;
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}
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uint8_t IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
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{
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uint8_t ret = 0;
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if ( g_pwm_buffer_update_required )
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{
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ret |= IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] );
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ret |= IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] );
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}
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g_pwm_buffer_update_required = false;
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return ret;
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}
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uint8_t IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
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{
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uint8_t ret = 0;
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if ( g_led_control_registers_update_required )
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{
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for ( int i=0; i<18; i++ )
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{
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ret |= IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] );
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ret |= IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] );
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}
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}
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return ret;
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}
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