138 lines
3.6 KiB
C
138 lines
3.6 KiB
C
/*
|
|
Copyright 2012 Jun Wako <wakojun@gmail.com>
|
|
Copyright 2016 Priyadi Iman Nurcahyo <priyadi@priyadi.net>
|
|
|
|
This program is free software: you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation, either version 2 of the License, or
|
|
(at your option) any later version.
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#ifndef CONFIG_H
|
|
#define CONFIG_H
|
|
|
|
|
|
#define VENDOR_ID 0xFEED
|
|
#define PRODUCT_ID 0x6535
|
|
#define DEVICE_VER 0x0100
|
|
#define MANUFACTURER QMK
|
|
#define PRODUCT IBM Terminal Keyboard
|
|
|
|
|
|
/* matrix size */
|
|
#define MATRIX_ROWS 17 // keycode bit: 3-0
|
|
#define MATRIX_COLS 8 // keycode bit: 6-4
|
|
|
|
|
|
/* legacy keymap support */
|
|
#define USE_LEGACY_KEYMAP
|
|
|
|
|
|
/* key combination for command */
|
|
#define IS_COMMAND() ( \
|
|
get_mods() == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT) | MOD_BIT(KC_RALT) | MOD_BIT(KC_RCTL)) \
|
|
)
|
|
|
|
|
|
/*
|
|
* PS/2 USART configuration for ATMega32U4
|
|
*/
|
|
#ifdef PS2_USE_USART
|
|
/* XCK for clock line */
|
|
#define PS2_CLOCK_PORT PORTD
|
|
#define PS2_CLOCK_PIN PIND
|
|
#define PS2_CLOCK_DDR DDRD
|
|
#define PS2_CLOCK_BIT 5
|
|
/* RXD for data line */
|
|
#define PS2_DATA_PORT PORTD
|
|
#define PS2_DATA_PIN PIND
|
|
#define PS2_DATA_DDR DDRD
|
|
#define PS2_DATA_BIT 2
|
|
|
|
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
|
|
/* set DDR of CLOCK as input to be slave */
|
|
#define PS2_USART_INIT() do { \
|
|
PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
|
|
PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
|
|
UCSR1C = ((1 << UMSEL10) | \
|
|
(3 << UPM10) | \
|
|
(0 << USBS1) | \
|
|
(3 << UCSZ10) | \
|
|
(0 << UCPOL1)); \
|
|
UCSR1A = 0; \
|
|
UBRR1H = 0; \
|
|
UBRR1L = 0; \
|
|
} while (0)
|
|
#define PS2_USART_RX_INT_ON() do { \
|
|
UCSR1B = ((1 << RXCIE1) | \
|
|
(1 << RXEN1)); \
|
|
} while (0)
|
|
#define PS2_USART_RX_POLL_ON() do { \
|
|
UCSR1B = (1 << RXEN1); \
|
|
} while (0)
|
|
#define PS2_USART_OFF() do { \
|
|
UCSR1C = 0; \
|
|
UCSR1B &= ~((1 << RXEN1) | \
|
|
(1 << TXEN1)); \
|
|
} while (0)
|
|
#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
|
|
#define PS2_USART_RX_DATA UDR1
|
|
#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
|
|
#define PS2_USART_RX_VECT USART1_RX_vect
|
|
#endif
|
|
|
|
|
|
/*
|
|
* PS/2 Interrupt configuration
|
|
*/
|
|
#ifdef PS2_USE_INT
|
|
/* uses INT1 for clock line(ATMega32U4) */
|
|
#define PS2_CLOCK_PORT PORTD
|
|
#define PS2_CLOCK_PIN PIND
|
|
#define PS2_CLOCK_DDR DDRD
|
|
#define PS2_CLOCK_BIT 1
|
|
|
|
#define PS2_DATA_PORT PORTD
|
|
#define PS2_DATA_PIN PIND
|
|
#define PS2_DATA_DDR DDRD
|
|
#define PS2_DATA_BIT 0
|
|
|
|
#define PS2_INT_INIT() do { \
|
|
EICRA |= ((1<<ISC11) | \
|
|
(0<<ISC10)); \
|
|
} while (0)
|
|
#define PS2_INT_ON() do { \
|
|
EIMSK |= (1<<INT1); \
|
|
} while (0)
|
|
#define PS2_INT_OFF() do { \
|
|
EIMSK &= ~(1<<INT1); \
|
|
} while (0)
|
|
#define PS2_INT_VECT INT1_vect
|
|
#endif
|
|
|
|
|
|
/*
|
|
* PS/2 Busywait configuration
|
|
*/
|
|
#ifdef PS2_USE_BUSYWAIT
|
|
#define PS2_CLOCK_PORT PORTD
|
|
#define PS2_CLOCK_PIN PIND
|
|
#define PS2_CLOCK_DDR DDRD
|
|
#define PS2_CLOCK_BIT 1
|
|
|
|
#define PS2_DATA_PORT PORTD
|
|
#define PS2_DATA_PIN PIND
|
|
#define PS2_DATA_DDR DDRD
|
|
#define PS2_DATA_BIT 0
|
|
#endif
|
|
|
|
#endif
|